Moore’s Law and Rock’s Law Reshape Semiconductor Economics and Market Power

Introduction: The Price of Predictability

For decades, the semiconductor industry operated under a simple promise: every two years, the number of transistors on a chip would double, delivering cheaper, faster, and more energy-efficient processors. This trajectory, known as Moore’s Law, became the bedrock of innovation across computing, communications, and consumer electronics. Yet as transistor densities approach atomic scales, the cost of maintaining that cadence has exploded. Rock’s Law—the observation that the capital cost of fabrication facilities rises exponentially with each new node—now imposes a brutal reality: advanced fabs cost between $10 billion and $20 billion, and a single high‑numerical‑aperture extreme ultraviolet (EUV) scanner costs over $400 million.

A recent paper titled “From Moore’s Law to Market Rivalry” (Albrecht, Manne, Teece, Zúñiga, November 12, 2025) provides a fresh framework linking these two technological laws to the structural transformation of global chip markets. The authors argue that the interplay between Moore’s Law—understood today as guaranteed improvements in performance per watt and per dollar—and Rock’s Law is rewriting the economic logic of the entire industry. Instead of stable competition among many players, the semiconductor sector is evolving into a series of winner‑takes‑most contests at each process node.

[IMAGE: Infographic showing Moore’s Law curve (transistor count over time) overlaid with Rock’s Law curve (fab cost over time), highlighting the growing gap between performance gains and capital expenditure.]

The Hidden Economic Logic: Competition *for* the Market, Not *in* the Market

Traditional industries often feature “competition in the market,” where multiple incumbents vie for market share with relatively stable advantages. The semiconductor industry, by contrast, experiences what the paper calls “competition for the market.” Each new process node—7nm, 5nm, 3nm, 2nm—resets the playing field. Past leaders can fall behind if they fail to invest at the required scale; laggards may leapfrog ahead if they time their capital commitments correctly.

This dynamic creates a stark winner‑takes‑most outcome. Firms that successfully reach a new node first capture the bulk of high‑margin business from customers like Apple, Nvidia, and AMD. Those that stumble face irrelevance. The paper highlights that node transitions are the true battleground for survival, not incremental improvements. Unlike in software or consumer goods, where incumbency confers network effects, in semiconductor manufacturing the primary advantage is the ability to make colossal, irreversible capital bets years before a single chip is sold.

The implication is profound: the industry is no longer a collection of steady competitors but a series of high‑stakes races, each requiring a fresh commitment of tens of billions of dollars. This structure naturally reduces the number of viable players, as only a handful of firms can afford to stay in the race.

[IMAGE: Diagram showing a timeline of process nodes (7nm, 5nm, 3nm, 2nm) with icons of leading firms (TSMC, Intel, Samsung) and arrows indicating shifts in market leadership at each transition.]

TSMC’s Capital Intensity: A Case Study in Survival Economics

No company illustrates the force of Rock’s Law better than Taiwan Semiconductor Manufacturing Company (TSMC). According to data from the 2025 paper, TSMC’s capital expenditure has consistently run at 30–50% of revenue since 2009, peaking above 50% in 2021. When research and development spending is included, total investment often exceeds 40–60% of revenue. For a company with annual revenue exceeding $70 billion, this means tens of billions of dollars poured into fabrication facilities and process development every year.

Such sustained investment is not optional—it is the price of staying in the node race. TSMC’s ability to deliver consistent node migration—from 7nm to 5nm to 3nm, and soon 2nm—depends entirely on this capital intensity. The paper emphasizes that Rock’s Law translates directly into corporate strategy: either invest at these levels or exit the market. TSMC’s dominance is therefore not merely a result of technical prowess but of an unrelenting financial commitment that competitors like Intel and Samsung have struggled to match.

The data also shows that TSMC’s R&D intensity (R&D as a percentage of revenue) has remained in the 40–60% range when combined with CapEx. This total investment level acts as a nearly insurmountable barrier to entry for any new firm. Even well‑funded national initiatives, such as the U.S. CHIPS Act, face the challenge that building a competitive fab ecosystem requires not just one‑time subsidies but a decade‑long commitment at these extraordinary spending rates.

[IMAGE: Bar chart comparing TSMC’s CapEx-to-revenue ratio over 2009‑2025, with annotations highlighting the 2021 peak above 50%, alongside a line showing combined CapEx+R&D as a share of revenue.]

From Competition to Consolidation: The Vanishing Middle

As node costs soar, the number of firms capable of leading at the frontier shrinks. In 2010, half a dozen companies could claim a leading‑edge logic process. Today, only three—TSMC, Samsung, and Intel—remain in the race for 3nm and beyond, and Intel’s position remains uncertain. The paper notes that this consolidation is not accidental; it is the direct result of Rock’s Law filtering out players who cannot sustain the required capital trajectory.

This concentration has ripple effects across the entire chip supply chain. EUV lithography is dominated by a single Dutch firm, ASML. The most advanced photoresists, deposition tools, and metrology equipment are supplied by a handful of specialized vendors. The suppliers themselves must invest billions to stay compatible with each new node, further tightening the ecosystem. The result is a supply chain that becomes more fragile and more geopolitically sensitive with every process generational shift.

The phenomenon extends beyond logic chips. Memory makers like Micron, SK Hynix, and Samsung face similar dynamics in DRAM and NAND, though the capital intensity per node is somewhat lower. Even in mature nodes—those above 28nm—the cost of upgrading to new equipment for specialty applications (automotive, IoT, power chips) is rising, pushing smaller foundries to consolidate or exit.

Geopolitical Consequences and Policy Dilemmas

The economic logic of Moore’s Law and Rock’s Law has deep geopolitical implications. Because fab construction and process development require years of sustained investment, countries that fall behind find it nearly impossible to catch up quickly. The paper highlights that the concentration of leading‑edge manufacturing in Taiwan (TSMC) and South Korea (Samsung) creates strategic vulnerabilities for the United States, Europe, and Japan.

Policy interventions, such as the U.S. CHIPS Act and the European Chips Act, aim to reshore fabrication capacity. However, the authors argue that these efforts face a fundamental mismatch. Subsidizing a single fab may help, but it does not replicate the decades‑long capital‑intensity ecosystem that incumbents have built. Even if a new fab is constructed, it must attract customers, develop process expertise, and achieve yields that match TSMC’s—a process that historically takes years and billions more.

The paper also warns that excessive policy fragmentation—each region trying to build its own self‑sufficient supply chain—could lead to overcapacity in mature nodes and underinvestment in cutting‑edge research. The true competitive advantage, the authors suggest, lies not in owning fabs but in being able to design chips that exploit the most advanced nodes. For most countries, the optimal policy may be to invest in design capabilities and secure supply through strategic alliances, rather than attempting to replicate the full vertical stack.

[IMAGE: World map with bubble sizes representing semiconductor fabrication capacity by country/region, overlaid with arrows showing current dependencies (Taiwan→US, Korea→EU, etc.) and dashed lines indicating policy attempts to create new capacity.]

The Future of Silicon Innovation: Is the Party Ending?

A critical question is whether Moore’s Law can continue to deliver economic value as physical limits approach. The paper points out that even as transistor scaling slows, architectural innovations (advanced packaging, chiplets, heterogeneous integration) can maintain performance improvements. However, these new techniques also require massive capital outlays—3D stacking, for example, demands advanced bonding equipment and new metrology that further raise the cost bar.

Rock’s Law shows no sign of easing. The next generation of high‑NA EUV scanners, needed for 2nm and beyond, is expected to cost more than $500 million each. Fabs for these nodes will likely exceed $20 billion. The paper notes that the ratio of fab cost to per‑transistor cost may actually increase, undermining the historical “cost per transistor” decline that made silicon so revolutionary.

This creates a potential inflection point. If the price of staying on the Moore’s Law curve becomes prohibitive for even the largest players, the industry may bifurcate: a small number of firms racing at the frontier for the highest‑margin applications (AI accelerators, smartphones, high‑performance computing) while a larger number of firms serve most markets with mature or trailing‑edge nodes. This would be a fundamental shift from the universal scaling that defined the past 50 years.

Conclusion: The New Competitive Landscape

The semiconductor industry is being reshaped by the unforgiving arithmetic of Rock’s Law applied to Moore’s Law. The guarantee of predictable performance gains has come at a price no smaller than the exclusion of all but the most capital‑resilient players. TSMC’s sustained 30–50% capital expenditure and integrated R&D spending of 40–60% of revenue are not aggressive tactics—they are survival strategies in a market where the cost of entry doubles every few years.

The result is a shift from “competition in the market” to “competition for the market,” where supply chains tighten, geopolitical dependencies deepen, and only a few firms can afford to stay at the cutting edge. For global business leaders, policymakers, and investors, understanding this hidden economic logic is no longer optional. It is essential for navigating the next decade of silicon innovation—and for recognizing that the future of chips will be determined as much by balance sheets as by physics.

[IMAGE: Conceptual image of a silicon wafer with a glowing transistor grid, transitioning into a grid of dollar signs and upward‑sloping cost curves, symbolizing the merger of technological progress with exponential capital costs.]